深圳市伟格兴电子科技有限公司是一家大型集成电路代理,分销商,公司在深圳.作为的集成电路分销商,我公司拥有丰富经验的IC销售人员,为客户提供全面的服务支持。我公司主要从事美国ADI、MAXIM,TI,ON,ST,FAIRCHILD,ADI,NXP等世界的IC和功率模块 GTR、IGBT、IPM、PIM可控硅 整流桥 二极管等,涵盖通信、半导体、仪器仪表、航天航空、计算机及周边产品、消费类电子等广泛领域。公司多,价格合理。经过我公司全体人员的共同努力, 深圳市伟格兴电子科技有限公司现已成为国有大、中型企业,企业,中小型分销商的可靠合作伙伴,业务遍及中国大陆及海外市场。 我公司在国外拥有直接的货源和存货,与**上享有良好声誉的大量供应商建立了良好的长期合作关系。定货渠道好,周期短,以‘交货快捷、质量保证、价格合理’为服务的宗旨,保证所提供货品均为原包装。 我公司一贯坚持:“品质、服务至上”的发展宗旨以向用户提供系统 免费技术解决方案和满意的服务为己任。我们希望结交更多的合作伙伴,以合理的价格、的服务,与大家共同开创广阔的未来!同时也希望与业界**进行广泛的交流与合作,共同为电子业繁荣发展作出自己的贡献!
Scaler Register (Bank=00, Registers 01h ~ 9Fh)
Index Name Bits Description
SD_MD 5 Output PLL spread spectrum Mode.
0: Normal.
1: Reverse for mode 1.
- 4:0 Reserved.
24h - 7:0 Default : - Access : -
- 7:0 Reserved.
25h OPL_SET0 7:0 Default : 0x44 Access : R/W, DB
OPL_SET[7:0] 7:0 Output PLL Set.
26h OPL_SET1 7:0 Default : 0x55 Access : R/W, DB
OPL_SET[15:8] 7:0 See description for OPL_SET [7:0].
27h OPL_SET2 7:0 Default : 0x24 Access : R/W, DB
OPL_SET [23:16] 7:0 See description for OPL_SET [7:0].
28h OPL_STEP0 7:0 Default : 0x20 Access : R/W, DB
OPL_STEP[7:0] 7:0 Output PLL spread spectrum Step.
29h OPL_STEP1 7:0 Default : 0x00 Access : R/W, DB
- 7 Reserved.
- 6 Reserved.
- 5 Reserved.
- 4:3 Reserved.
OPL_STEP[10:8] 2:0 See description for OPL_STEP[7:0].
2Ah OPL_SPAN 7:0 Default : 0x00 Access : R/W, DB
OPL_SPAN[7:0] 7:0 Output PLL spread spectrum Span.
2Bh OPL_SPAN 7:0 Default : 0x00 Access : R/W, DB
READ_FRAME 7 0: OPL_SET stores line-based value.
1: OPL_SET stores frame-based value.
OPL_SPAN[14:8] 6:0 See description for OPL_SPAN[7:0].
2Ch ~
2Fh
- 7:0 Default : - Access : -
- 7:0 Reserved.
30h HSR_L 7:0 Default : 0x00 Access : R/W
HSR [7:0] 7:0 Horizontal Scaling ratio (20 bits fraction) for scaling down 1/2^20
to (2^20-1)/2^20 (lower 8 bits).
31h HSR_M 7:0 Default : 0x00 Access : R/W
HSR[15:8] 7:0 Horizontal Scaling ratio (20 bits fraction) for scaling down 1/2^20
to (2^20-1)/2^20 (middle 8 bits).
Sigmastar Confidential for
芯智**有限公司
Internal Use Only
Security Level: Confidential A
Copyright © 2018 SigmaStar Technology Corp. All rights reserved.
Scaler Register (Bank=00, Registers 01h ~ 9Fh)
Index Name Bits Description
32h HSR_H 7:0 Default : 0x00 Access : R/W
HS_EN 7 Horizontal Scaling Enable.
0: Disable.
1: Enable.
CBILINEAR_EN 6 Complemental Bi-Linear Enable.
FORCEBICOLOR 5 0: Chrominance using same setting as Luminance defined by
CBILINEAR.
1: Chrominance always using bi-linear algorithm.
- 4 Reserved.
HSR[19:16] 3:0 Horizontal Scaling Ratio (20 bits fraction) for scaling down 1/2^20
to (2^20-1)/2^20 (higher 8 bits).
33h VSR_L 7:0 Default : 0x00 Access : R/W
VSR[7:0] 7:0 Vertical Scaling ratio (2 bits integer, 20 bits fraction) for scaling
down to 1/2.9999 (lower 8 bits).
xx.xxxxxxxxxxxxxxxxxxxx
34h VSR_M 7:0 Default : 0x00 Access : R/W
VSR[15:8] 7:0 Vertical Scaling ratio (2 bits integer, 20 bits fraction) for scaling
down to 1/2.9999 (middle 8 bits).
xx.xxxxxxxxxxxxxxxxxxxx
35h VSR_H 7:0 Default : 0x00 Access : R/W
VS_EN 7 Vertical Scaling Enable.
0: Disable.
1: Enable.
VSM_SEL 6 Vertical Scaling Method Select.
0: Original.
1: New.
VSR[21:16] 5:0 Vertical Scaling ratio (2 bits integer, 20 bits fraction) for scaling
down to 1/2.9999 (higher 8 bits).
xx.xxxxxxxxxxxxxxxxxxxx
36h VDSUSG 7:0 Default: 0x00 Access : R/W
LBF_INCLK 7 Line-Buffer using Input Clock.
LBF_OUTCLK 6 Line-Buffer using Output Clock.
LBF_LIVE 5 Line-Buffer always Live.
OUTCLK_DIV3 4 Output Clock is 1/3 frequency of OPLL output.
EN_OFST 3 Enable Offset for even/odd scaling.
OFST_INV 2 Offset Inverting for even/odd scaling.
Scaler Register (Bank=00, Registers 01h ~ 9Fh)
Index Name Bits Description
VDS_MTHD 6 Input data double sample Method.
0: Using average.
1: Using advance GT filter.
IVDS 5 Input VSYNC Delay Select.
0: Delay 1/4 input HSYNC (recommended).
1: No delay.
HES 4 Input HSYNC reference Edge Select.
0: From HSYNC leading edge, default value.
1: From HSYNC tailing edge.
VES 3 Input VSYNC reference Edge Select.
0: From VSYNC leading edge, default value.
1: From VSYNC tailing edge.
ESLS 2 Early Sample Line Select.
0: 8 lines.
1: 16 lines.
VWRP 1 Input image Vertical Wrap.
0: Disable.
1: Enable.
HWRP 0 Input image Horizontal Wrap.
0: Disable.
1: Enable.
04h ISCTRL 7:0 Default : 0x10 Access : R/W
DDE 7 Direct DE mode for CCIR input.
0: Disable direct DE.
1: Enable direct DE.
DEGR[2:0] 6:4 DE or HSYNC post Glitch removal Range.
HSFL 3 Input HSYNC Filter.
0: Filter off.
1: Filter on.
ISSM 2 Input Sync Sample Mode.
0: Normal.
1: Glitch-removal.
MVD_SEL 1:0 MVD mode Select
0: CVBS.
1: S-Video.
2: YCbCr.
3: RGB.
05h SPRVST_L 7:0 Default : 0x10 Access : R/W, DB
Sigmastar Confidential for
芯智**有限公司
Internal Use Only
Security Level: Confidential A
Copyright © 2018 SigmaStar Technology Corp. All rights reserved.
Scaler Register (Bank=00, Registers 01h ~ 9Fh)
Index Name Bits Description
SPRVST[7:0] 7:0 Image vertical sample start point, count by input HSYNC (lower 8
bits).
06h SPRVST_H 7:0 Default : 0x00 Access : R/W, DB
- 7:3 Reserved.
SPRVST[10:8] 2:0 Image vertical sample start point, count by input HSYNC (higher 3
bits).
07h SPRHST_L 7:0 Default : 0x01 Access : R/W, DB
SPRHST[7:0] 7:0 Image horizontal sample start point, count by input dot clock
(lower 8 bits).
08h SPRHST_H 7:0 Default : 0x00 Access : R/W, DB
- 7:4 Reserved.
SPRHST[11:8] 3:0 Image horizontal sample start point, count by input dot clock
(higher 4 bits).
09h SPRVDC_L 7:0 Default : 0x10 Access : R/W, DB
SPRVDC[7:0] 7:0 Image vertical resolution (vertical display enable area count by
line; lower 8 bits).
0Ah SPRVDC_H 7:0 Default: 0x00 Access : R/W
- 7:3 Reserved.
SPRVDC[10:8] 2:0 Image vertical resolution (vertical display enable area count by
line; higher 3 bits).
0Bh SPRHDC_L 7:0 Default : 0x10 Access : R/W
SPRHDC[7:0] 7:0 Image horizontal resolution (horizontal display enable area count
by pixel; lower 8 bits).
0Ch SPRHDC_L 7:0 Default : 0x00 Access : R/W
- 7:3 Reserved.
SPRHDC[11:8] 3:0 Image horizontal resolution (horizontal display enable area count
by pixel; higher 4 bits).
0Dh LYL 7:0 Default : 0x00 Access : R/W
- 7:4 Reserved.
LYL[3:0] 3:0 Lock Y Line.
0Eh INTLX 7:0 Default : 0x00 Access : -
ITU_EXT_FIELD 7 Using External FIELD for ITU interface.
Digital Panel Output Interface
Pin Name Pin Type Function Pin
CLKO Output Display Clock Output 53
DEO/TCON[10] Output Display Enable Output 54
VSYNCO/TCON[9] Output Vertical Sync Output / TCON Output[9] 55
HSYNCO/TCON[8] Output Horizontal Sync Output / TCON Output[8] 56
ROUT[7]/TCON[6] Output Red channel Output [7] / TCON Output[6] 67
ROUT[6]/TCON[7] Output Red channel Output [6] / TCON Output[7] 66
ROUT[5] Output Red channel Output [5] 65
Sigmastar Confidential for
芯智**有限公司
Internal Use Only
SSD102
Smart HD Display Controller
Preliminary Data Sheet Version 0.1
Security Level: Confidential A - 8 - 2/27/2018
Copyright © 2018 SigmaStar Technology Corp. All rights reserved.
Pin Name Pin Type Function Pin
ROUT[4] Output Red channel Output [4] 64
ROUT[3] Output Red channel Output [3] 63
ROUT[2] Output Red channel Output [2] 62
ROUT[1] Output Red channel Output [1] 61
ROUT[0] Output Red channel Output [0] 60
GOUT[7]/TCON[4] Output Green channel Output [7] / TCON Output[4] 75
GOUT[6]/TCON[5] Output Green channel Output [6] / TCON Output[5] 74
GOUT[5:4] Output Green channel Output [5:4] 73, 72
GOUT[3] Output Green channel Output [3] 71
GOUT[2] Output Green channel Output [2] 70
GOUT[1] Output Green channel Output [1] 69
GOUT[0] Output Green channel Output [0] 68
BOUT[7]/TCON[2] Output Blue channel Output [7] / TCON Output[2] 90
BOUT[6]/TCON[3] Output Blue channel Output [6] / TCON Output[3] 89
BOUT[5:0] Output Blue channel Output [5:0] 88-83
TCON[0] Output TCON Output[1] 92
Digital Video Input Interface
Pin Name Pin Type Function Pin
CLKIN Input w/5V-tolerant Sample Clock ITU656 Video Input 26
VD[7:0] Input w/5V-tolerant ITU656 Video Data bus 34-27
GPIO Interface
Pin Name Pin Type Function Pin
GPIOA I/O w/ 5V-tolerant General Purpose Input Output; 4mA driving strength 45
GPIOD I/O w/ 5V-tolerant General Purpose Input Output; 4mA driving strength 93
GPIOE I/O w/ 5V-tolerant General Purpose Input Output; 4mA driving strength 94
I2C Master Interface
Pin Name Pin Type Function Pin
I2CMD/TXD_SDA I/O w/ 5V-tolerant,
w/ pull-up resistor
Serial Bus Data 22
I2CMC/RXD_SCL I/O w/ 5V-tolerant
w/ pull-up resistor
Serial Bus Clock 21
Sigmastar Confidential for
芯智**有限公司
Internal Use Only
SSD102
Smart HD Display Controller
Preliminary Data Sheet Version 0.1
Security Level: Confidential A - 9 - 2/27/2018
Copyright © 2018 SigmaStar Technology Corp. All rights reserved.
Misc. Interface
Pin Name Pin Type Function Pin
RESET Schmitt Trigger Input
w/ 5V-tolerant
Hardware Reset; active high 52
XTAL_IN Analog Input Crystal Oscillator Input 99
XTAL_OUT Analog Output Crystal Oscillator Output 98
Power Pins
Pin Name Pin Type Function Pin
AVDD_ANA 3.3V Power Analog ADC Power 1
AVDD_MPLL 3.3V Power MPLL Power 100
VDDC 1.2V Power Digital Core Power 35, 57
VDDP 3.3V Power Digital Input/Output Power 23, 58, 82
AGND Ground Analog Ground 9, 97
GND Ground Ground 20, 36, 37,
49, 59, 78,
91
No Connect
Pin Name Pin Type Function Pin
NC
No Connects 76, 77,
79-81
SPHE8202TQ /Q /RQ /V SPHE8104LW /TW EN25T80 /16 SDRAM/DDR SDRAM : W9812G6JH-6 W9864G6XH-6 HY57V641620FTP-7 H57V1262GTR-75C EM636165TS-7 EM638165TS-7 EM639165TS-7G EM63A165TS-6G 音频IC: TDA7388 TDA7496 TDA7377 TDA7296 TDA7381 TDA7384 TDA2030 LM1875T TEF6621 TEF6606 TDA2050 TDA1517P PCF8563T AT24C02 运放IC: NJM3414AM/AV NJM2107F NJM4558 NJM4556 NJM4560 LM324 LM358 电源管理IC: MP1580HS MP1540DJ-LF-Z MP1584EN-LF-Z MP2303ADN-LF-Z MP3202DJ-LF-Z MP2605DQ-LF-Z MP2307DN-LF-Z MP7720DS-LF-Z MP1430DN-LF-Z LM2576/2596 马达驱动IC: BA5954FP、BA5888FP、 BA6287F、BA6847 BA6849、BA3121F、BU1924F LCD驱动 IC: CS75853 LC75853/PT6553 LC72131 触摸IC: ADS7846E TSC2003I TSC2007 TSC2046
深圳伟格兴电子,地处亚太深圳。诚信13年合作伙伴。原装质量保证。只做原装!
只做原装TI,DIODES,ON,NXP,ST,SKYWORKS,EALTEK ,RICHTEK 等**,产品线以单片机、逻辑、运放、驱动、存储、接口IC为主
配单!优势渠道,
如您刚好有需要,可别忘记找我这个老朋友问问
深圳市伟格兴电子科技有限公司是一家大型集成电路代理,分销商,公司在深圳.作为专业的集成电路分销商,我公司拥有丰富经验的IC销售人员,为客户提供全面的服务支持。我公司主要从事美国ADI、MAXIM,TI,ON,ST,FAIRCHILD,ADI,NXP等世界**品牌的IC和功率模块 GTR、IGBT、IPM、PIM可控硅 整流桥 二极管等,涵盖通信、半导体、仪器仪表、航天航空、计算机及周边产品、消费类电子等广泛领域。公司现货多,价格合理。经过我公司全体人员的共同努力, 深圳市伟格兴电子科技有限公司现已成为国有大、中型企业,**企业,中小型分销商的可靠合作伙伴,业务遍及中国大陆及海外市场。 我公司在国外拥有直接的货源和存货,与**上享有良好声誉的大量供应商建立了良好的长期合作关系。定货渠道好,周期短,以‘交货快捷、质量保证、价格合理’为服务的宗旨,保证所提供货品均为原包装**。 我公司一贯坚持:“品质**、服务至上”的发展宗旨以向用户提供*系统 免费技术解决方案和较满意的服务为己任。我们希望结交更多的合作伙伴,以合理的价格、*的优质服务,与大家共同开创广阔的未来!同时也希望与业界**进行广泛的交流与合作,共同为电子业繁荣发展作出自己的贡献!!! 真诚希望与广大客商携手共进! 互利合作,共同发展。